The present invention relates generally to the field of computer graphics; particularly to an arithmetic pipeline form of image processing circuits, using intergrated circuits, for solving an equation of the form A.sup.m B.sup.n +C.sup.o D.sup.p +E.sup.q F.sup.r +G.sup.s H.sup.t . . . .
Flight simulation is one form of computer graphics which requires image processing in real time, and is very complex. Functions such as windowing, transformations, and clipping may use the above form of equation.
An example of an arithmetic pipeline is shown by Courturier in U.S. Pat. No. 4,433,438, "Sobel Edge Extraction Circuit for Image Processing", issued Feb. 21, 1984. which includes simplified look-up tables in read only memory for performing a squaring function.
Other U.S. patents of interest relating to arithmetic signal processing circuits include U.S. Pat. No. 3,789,203 to Catherall et al, which discloses a logic system for generating a variety of functions by approximation and interpolation. The patented circuit includes elements of electronic data processing such as shift registers, adders, and the like to perform the interpolation involving addition, subtraction and division by 2. The algorithm of the reference is described as an add-shift algorithm. A digital logarithmic function generator is taught by Katsuoka et al in U.S. Pat. No. 3,988,600. In Dotter, Jr. (U.S. Pat. No. 4,143,363) a piece-wise linear process is used to translate between analog and digital signals. Platt (U.S. Pat. No. 3,560,726) generates the approximation of a function by adding straight line segments, each characterized by a gating point and a slope. A summing amplifier adds the segments to form the prescribed function. A computer which generates logarithmic and root functions is taught by Romo in U.S. Pat. No. 3,965,344. Brown (U.S. Pat. No. 4,300,203) combines a log converter with a microcomputer to perform a linear interpolation and Smith (U.S. Pat. No. 3,940,603) combines a plurality of log circuits to perform multiplication and division.